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設計技術シリーズ

パワエレ技術者のためのSiCパワー半導体デバイス~高信頼性を実現する素子と実装技術~

著: 岩室 憲幸 (筑波大学)
定価: 4,400円(本体4,000円+税)
判型: A5
ページ数: 186 ページ
ISBN: 978-4-910558-26-4
発売日: 2024/2/20
管理No: 124

【目次】

第1章 パワーエレクトロニクスならびにパワー半導体デバイス

  1. 1.1 はじめに
  2. 1.2 インバータ回路の種類
  3. 1.3 パワー半導体デバイスの役割とその課題
  4. 1.4 パワー半導体デバイス開発の位置づけ
  5. 1.5 パワー半導体デバイスの代表的な特性項目
  6. 1.6 パワー半導体デバイスの種類
  7. 1.7 現代のパワー半導体デバイスの主役:MOSFETとIGBT

第2章 シリコンパワー半導体デバイスの現状ならびに進展

  1. 2.1 開発スピードが一向に衰えないシリコンパワー半導体デバイス
  2. 2.2 シリコンMOSFET・IGBTを支える最新技術
    1. 2.2.1 基本セル構造
    2. 2.2.2 シリコンMOSFETの進展
    3. 2.2.3 シリコンIGBTの進展
  3. 2.3 IGBTモジュール実装技術の進展
  4. 2.4 特性改善のための次の一手
  5. 参考文献

第3章 SiCパワー半導体デバイスの進展

  1. 3.1 はじめに
  2. 3.2 SiCパワー半導体デバイス優位点のおさらい
  3. 3.3 SiC MOSFETかSiC IGBTか
  4. 3.4 SiC MOSFET
    1. 3.4.1 SiC MOSFETを取り巻く現在の状況
    2. 3.4.2 SiC MOSFET普及のための課題
    3. 3.4.3 結晶成長とウェハ加工プロセス
    4. 3.4.4 低オン抵抗化とチップコストの低減
    5. 3.4.5 さらなる高速スイッチング化実現に向けて
    6. 3.4.6 内蔵pinダイオードの順方向電圧劣化
    7. 3.4.7 ショットキーバリアダイオード (SBD) 内蔵SiC MOSFET
  5. 3.5 将来のSiC MOSFETに向けての新技術
    1. 3.5.1 SiC Superjunction MOSFET
    2. 3.5.2 FinFET構造
    3. 3.5.3 モノリシックSiCパワーIC技術
  6. 参考文献

第4章 SiC MOSFET破壊耐量

  1. 4.1 はじめに
  2. 4.2 安全動作領域
  3. 4.3 負荷短絡耐量
    1. 4.3.1 直流印加電圧が高い場合(例:耐圧1200 V素子で直流印加電圧VDC = 800 Vの場合)
    2. 4.3.2 直流印加電圧が低い場合(例:耐圧1200 V素子で直流印加電圧VDC = 400 Vの場合)
    3. 4.3.3 SBD内蔵SiC MOSFETの負荷短絡耐量解析とその向上策
    4. 4.3.4 素子表面にCuブロックを付加したSiC MOSFETの負荷短絡耐量
  4. 4.4 ターンオフ時の破壊耐量
  5. 4.5 Unclamped Inductive Switching(UIS)耐量
  6. 4.6 SiC MOSFET内蔵ダイオードの順方向サージ電流耐量
    1. 4.6.1 順方向サージ電流耐量とは
    2. 4.6.2 SiCトレンチMOSFETならびにSBD内蔵SiCトレンチMOSFETの耐量評価
    3. 4.6.3 素子表面にCuブロックを付加したSiC MOSFETの順方向サージ電流耐量
  7. 参考文献

第5章 SiC MOSFET実装技術

  1. 5.1 はじめに
  2. 5.2 必要となる要素技術
  3. 5.3 SiC MOSFETパッケージ内に取り込まれた要素技術
    1. 5.3.1 高強度接合技術
    2. 5.3.2 配線の低インダクタンス化技術
    3. 5.3.3 高耐熱化技術
    4. 5.3.4 高放熱化技術
  4. 参考文献

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